Skip to content Skip to navigation

New White Papers from NEXTGenIO

NEXTGenIO has just produced three new White Papers: one Systemware White Paper and two Architecture White Papers.

This White Paper discusses some of the software layers being developed to support and exploit NVDIMMs, from the driver to the OS and the applications. Those layers, collectively known as systemware, are the ones that can be used from the runtime system, schedulers and applications. In this document, we present the final software prototype of the different software layers, including the API that will be available to users. We have conducted tests on pre-release hardware to detect potential issues early.

NEXTGenIO is developing a prototype high-performance computing (HPC) and high-performance data analytics (HPDA) system that integrates byte-addressable storage class memory (SCM) into a standard compute cluster to provide greatly increased I/O performance for computational simulation and data analytics tasks. To enable us to develop a prototype that can be used by a wide range of computational simulation application, and data analytic tasks, we have undertaken a requirements-driven design process to create hardware and software architectures for the system. These architectures both outline the components and integration of the prototype system, and define our vision of what is required to integrate and exploit SCM to enable a generation of Exascale systems with sufficient I/O performance to ensure a wide range of workloads can be supported. The hardware architecture, which is the focus of this White Paper, is designed to scale up to an ExaFLOP system. It uses high-performance processors coupled with SCM in NVRAM (non-volatile random access memory) form, traditional DRAM memory, and an Omni-Path high-performance network, to provide a set of complete compute nodes that can undertake both HPC and HPDA workloads.

NEXTGenIO is developing a prototype high performance computing (HPC) and high performance data analytics (HPDA) system that integrates byte-addressable persistent memory (B-APM) into a standard compute cluster to provide greatly increased I/O performance for computational simulation and data analytics tasks. To enable us to develop a prototype that can be used by a wide range of computational simulation application, and data analytic tasks, we have undertaken a requirements-driven design process to create hardware and software architectures for the system. These architectures both outline the components and integration of the prototype system, and define our vision of what is required to integrate and exploit B-APM to enable a generation of Exascale systems with sufficient I/O performance to ensure a wide range of workloads can be supported. The systemware (system software), which supports the hardware in the system, will enable parallel I/O using the B-APM technology, provide a multi-node filesystem for users to exploit, enable use of object storage techniques, and provide automatic check-pointing if desired by a user. These features, along with other systemware components, will enable the system to support traditional parallel applications with high efficiency, and newer computing modes such as high performance data analytics.

For a full list of NEXTGenIO publications, including White Papers, project deliverables, journal publications and conference presentations, see http://www.nextgenio.eu/publications.