EPCC

The University of Edinburgh is one of Europe’s leading research universities and is represented in this project by its supercomputing centre, EPCC.

Established in 1990, the organisation is at the forefront of HPC service provision and research in Europe. EPCC has a full-time staff of 80 and a large array of HPC systems including the 118,080 core, 2.5 Petaflops Cray XC30 UK National HPC service, ARCHER. EPCC works with a wide variety of scientific and industrial partners; collaborative projects with industry represent 50% of EPCC’s annual turnover (£5 million in FY13/14 excluding capital costs). EPCC has led the UK’s technical work in all the PRACE projects to date and was the coordinator of the CRESTA project, which focused on the software challenges of Exascale computing.

In addition to its role as a national HPC service provider, EPCC provides a wide variety of services to both industry and academia including: HPC application design, development and re-engineering; HPC application performance optimisation; distributed computing consultancy and solutions (with a particular focus on Grid and Cloud computing); HPC facilities access; project management for software development; and data integration and data mining consultancy. The organisation has considerable experience of managing large, complex EU-funded projects including the Fortissimo project (which enables European SMEs to be more competitive globally through the use of simulation services running on a HPC cloud infrastructure).

The centre has a long history of working with HPC vendors to design leading edge novel HPC systems including the QCDOC system, the Maxwell FPGA system and, most recently, the IBM BlueGene/Q. EPCC brings its vast experience in leading large-scale collaborative projects to NEXTGenIO, thus ensuring its success. EPCC is at the forefront of HPC research and has a proven track record of successful project delivery, both in the hardware and software domains. EPCC lead the architecture work package, which will underpin all developments in NEXTGenIO, and contribute to the co-design, systemware and testing work packages, again drawing on experience from HPC service provision to novel hardware development and core HPC research.