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An Architecture for High Performance Computing and DataSystems using Byte-Addressable Persistent Memory

Authors: 
Adrian Jackson (EPCC), Michèle Weiland (EPCC), Mark Parsons (EPCC) and Bernhard Homoelle (Fujitsu)

This research paper was presented at ISC High Performance 2019 in Frankfurt, Germany (16-20 June 2019). It will appear in ISC High Performance 2019 International Workshops, Frankfurt/Main, Germany, June 20, 2019, Revised Selected Papers (Springer Verlag).

Abstract: Non-volatile and byte-addressable memory technology with performance close to main memory has the potential to revolutionise computing systems in the near future. Such memory technology provides the potential for extremely large memory regions (i.e. > 3TB per server), very high performance I/O, and new ways of storing and sharing data for applications and workflows. This paper proposes hardware and system software architectures that have been designed to exploit such memory for High Performance Computing and High Performance Data Analytics systems, along with descriptions of how applications could benet from such hardware, and initial performance results on a system with Intel Optane DC Persistent Memory.