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Systemware Architecture & Usage Scenarios - NEXTGenIO Architecture White Paper

Authors: 
Adrian Jackson, Iakovos Panourgias (EPCC), Bernhard Homölle (SVA), Alberto Miranda, Ramon Nou, Javier Conejero (BSC), Marcelo Cintra (Intel), Simon Smart, Antonino Bonanni (ECMWF), Holger Brunst, Christian Herold, Sarim Zafar (TU Dresden)

NEXTGenIO is developing a prototype high performance computing (HPC) and high performance data analytics (HPDA) system that integrates byte-addressable persistent memory (B-APM) into a standard compute cluster to provide greatly increased I/O performance for computational simulation and data analytics tasks.

To enable us to develop a prototype that can be used by a wide range of computational simulation application, and data analytic tasks, we have undertaken a requirements-driven design process to create hardware and software architectures for the system. These architectures both outline the components and integration of the prototype system, and define our vision of what is required to integrate and exploit B-APM to enable a generation of Exascale systems with sufficient I/O performance to ensure a wide range of workloads can be supported.

The systemware (system software), which supports the hardware in the system, will enable parallel I/O using the B-APM technology, provide a multi-node filesystem for users to exploit, enable use of object storage techniques, and provide automatic check-pointing if desired by a user. These features, along with other systemware components, will enable the system to support traditional parallel applications with high efficiency, and newer computing modes such as high performance data analytics.

Supporting Documents: 
NEXTGenIO_whitepaper3_OCT18_LO.pdf 916 Kb [0 download(s)]